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4-bit flash ADC in InP-HBT technology using distributed resistor ladder

机译:采用分布式电阻器阶梯的InP-HBT技术中的4位闪存ADC

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4-bit flash A/D converters have been designed and fabricated in InP-HBT technology. The circuit utilizes a novel distributed ladder structure to create the quantization reference voltages. Based on signal-to-noise-and-distortion measurements, the effective number of bits was calculated as 3.9 bits at 10 GS/S. The circuit consumes about 1.9 A from a single 31 V supply and allocates a total area of 3225×1875 μm2.
机译:4位闪存A / D转换器已采用InP-HBT技术进行了设计和制造。该电路利用一种新颖的分布式梯形结构来创建量化参考电压。基于信噪比和失真测量,在10 GS / S时,有效位数为3.9位。该电路从单个31 V电源消耗约1.9 A电流,并分配了总面积为3225×1875μm 2

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