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2.48832 GHz SMD-VCXO for OC-768

机译:OC-768的2.48832 GHz SMD-VCXO

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This paper describes 2.48832 GHz SMD-VCXO used for the SONET OC-768 (40 Gbps) system. The telecommunications provider is advancing in the direction where the OC-768 transmission technology is adopted for the next generation type system like metropolitan area network (MAN) to meet demand for the increasing internet and the multimedia data. The input of 16 signals of 2.5 Gbps is multiplexed in the OC-768 system, and it is assumed one serial 40 Gbps output data stream. The voltage control type oscillator for the reference signal source of PLL circuit for the OC-768 system requires the low sub-harmonics and the phase noise. In this oscillator, 155.52 MHz fundamental mode AT-cut crystal unit is used. The 16/sup th/ higher harmonic signal of 155.52 MHz is selected with 2.48832 GHz SAW filter and amplified. Two stages of this filtering circuit are used to suppress the sub-harmonics effectively. It performs the maximum sub-harmonic level -68 dB, the phase noise -130.34 dBc/Hz@30 kHz. The package size is 40/spl times/12.5/spl times/3.6 mm/sup 3/.
机译:本文介绍了用于SONET OC-768(40 Gbps)系统的2.48832 GHz SMD-VCXO。电信提供商正在朝着将OC-768传输技术用于诸如城域网(MAN)之类的下一代系统的方向发展,以满足对不断增长的Internet和多媒体数据的需求。 2.5 Gbps的16个信号的输入在OC-768系统中被多路复用,并假定一个串行40 Gbps输出数据流。用于OC-768系统的PLL电路的参考信号源的电压控制型振荡器要求低次谐波和相位噪声。在该振荡器中,使用了155.52 MHz基本模式AT切割晶体单元。使用2.48832 GHz SAW滤波器选择155.52 MHz的16 / sup / high谐波信号并进行放大。该滤波电路的两级用于有效抑制次谐波。它执行最大的次谐波电平-68 dB,相位噪声-130.34 dBc / Hz @ 30 kHz。包装尺寸为40 / spl倍/12.5/spl倍/3.6 mm / sup 3 /。

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