Configurable Microprocessor Implementation of Low Bit Rate AudioDecoding

摘要

Using a configurable microprocessor to implement low-bit-rate audio applications by tailoring the instruction setreduces algorithm complexity and implementation cost. As an example, this paper describes a Dolby Digital(AC-3) decoder implementation that uses a commercially-available configurable microprocessor to achieve 32-bit floating-point precision while minimizing the required processor clock rate and die size. This paper focuseson how the audio quality and features of the reference decoder algorithm dictate the customization of themicroprocessor. This paper shows examples of audio specific extensions to the processor's instruction set tocreate a family of AC-3 decoder implementations that meet multiple performance and cost points. How thisapproach benefits other audio applications is also discussed.