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Performance analysis of a 10-Gbit/s digital switch on MCM

机译:MCM上10 Gb / s数字交换机的性能分析

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摘要

The paper describes a test device realised as an MCM including four identical unencapsulated ASICs mounted on a 5-layer thin-film substrate. The MCM is a 12.8 Gbit/sec data switch and it has been designed with the purpose of performance evaluation of the module interconnection technology. A validation methodology has been developed to highlight the effect of variables such as line properties, switching noise, crosstalk and buffer topologies on the signal integrity. This approach has been used to characterise the transmission rate of the digital switch and to evaluate the system performance of the interconnection technology.
机译:该论文描述了一种实现为MCM的测试设备,包括安装在5层薄膜基板上的四个相同的未封装ASIC。 MCM是一个12.8 Gbit / sec数据交换机,其设计目的是评估模块互连技术的性能。已经开发出一种验证方法,以强调诸如线路特性,开关噪声,串扰和缓冲器拓扑之类的变量对信号完整性的影响。该方法已用于表征数字开关的传输速率并评估互连技术的系统性能。

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