In the last years Side-Channel Attacks have become a significant threat against security devices. Given this, several countermeasures have been proposed, ranging from reducing the leaked power consumption to masking schemes. However, these solutions imply a cost, typically in terms of resources, performance, and power consumption. This paper focuses on the deployment of masking to the AES computation supported on re-configurable technologies, in this particular case on a SmartFusion 2 SoC and its FPGA fabric and embedded ARM Cortex-M3 processor. This work proposes a novel masking scheme using Auxiliary Random Tables (RBoxes) to further harden the protection against SCA by not only extending the set of used random masks, but also by improving the update frequency of the mask sets. The implementation results suggest that the existing related masking schemes can be deployed at a cost of 645 additional LUTs, 16 µSRAMs, and no additional Large SRAMs, whilst achieving the same operating frequency.
展开▼
