Analysis for Capacitor Voltage Deterioration based on Harmonic Interaction in MMC Distributed Control System with Sub-module Asynchrony

摘要

Modular Multilevel Converters for HVDC applications normally adopt a distributed control system, where a large number of local controllers are employed, to manage considerable sub-modules (SMs) in the system. The manufacturing tolerance of crystal oscillators for local controllers introduces controller clock discrepancy and eventually leads to the asynchrony of triangular carriers implemented in individual SM for phase-shifted PWM scheme. Former study has analyzed that SM asynchrony introduces considerable harmonics around triangular carrier frequency. The asynchronous switching harmonics, in some way, distort the voltage waveform and deteriorate the performance and stability of MMCs. Detailed models describing the arm currents, capacitor voltages, and arm voltages with the presence of SM asynchrony are proposed for the sake of quantitative analysis and evaluation of the MMC distributed control system. Good agreements of the capacitor voltage diverging and arm voltage have been achieved between the theoretical calculations and experimental results. The calculated capacitor voltage deviation can be used to determine the interval of synchronization schemes according to the system requirements. The practical outcome can also be utilized to better evaluate the performance of the distributed control system taking the SM asynchrony into account.