Synthesis of Power-Efficient Analog Neural Networks for Signal Processing

摘要

This paper presents a concept and an implementation for an automatic, power-aware synthesis of neural networks as analog circuits. Our concept incorporates fully automatic design space exploration (synthesis) of powerefficient neuron-building blocks. Further, it implements techniques to have a programmable, and at the same time small neural network. First results on the schematic level for energy consumption of a small neural network applied to a peak detection dataset are presented.