Virtual impedance design for virtual synchronous generator controlled parallel microgrid inverters based on a cascaded second order general integrator scheme

摘要

This paper explores the impact of the output impedance on the power-sharing stability between parallelized microgrid inverters (MGIs) operating with virtual synchronous generator (VSG) method. In these systems, a virtual output impedance is usually added to the control loop of each MGI to improve the power sharing, regardless of line impedance unbalances. The time derivative of the MGI output current is usually used to implement the virtual impedance, which makes the system highly sensitive to the output current with high slew rate. To solve this, the virtual impedance is designed based on a cascaded second order general integrator (CSOGI) scheme, which is less sensitive to the output current noise, avoids to perform the time derivative function, achieves better output voltage total harmonic distortion. The proposed strategy is demonstrated in detail and validated with a two 100kVA-MGIs parallel system under linear and nonlinear loads.