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Design of Crosstalk NAND Gate Circuit Based on Interconnect Coupling Capacitance

机译:基于互连耦合电容的串扰与非门电路设计

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With scaling down of CMOS circuit technology, the size of CMOS metal interconnect line is getting thinner. After researching of the line-to-line coupling capacitance and line crosstalk mechanism, a crosstalk gate circuit design scheme based on interconnect coupling capacitance is proposed. Firstly, the influence factors of the coupling capacitance among the mental lines are analyzed. Then, the gate capacitance of the CMOS transistor is used to simulate the coupling capacitance among the interconnection lines. Finally, the NAND gate circuit is designed based on the interconnect crosstalk logic. Under the TSMC 65nm technology, the SPECTRE simulation result shows that the crosstalk gate logic function is correct.
机译:随着CMOS电路技术规模的缩小,CMOS金属互连线的尺寸越来越细。在研究了线间耦合电容和线串扰机制后,提出了一种基于互连耦合电容的串扰门电路设计方案。首先,分析了心理线之间耦合电容的影响因素。然后,使用CMOS晶体管的栅极电容来模拟互连线之间的耦合电容。最后,基于互连串扰逻辑设计与非门电路。在台积电65nm技术下,SPECTER仿真结果表明串扰门逻辑功能是正确的。

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