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Design and Implementation of Multiple PWM Channels using Universal Asynchronous Receiver Transmitter

机译:使用通用异步接收器发送器的多个PWM通道的设计与实现

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Universal Asynchronous Receiver Transmitter (UART) is a communication protocol used for sending and receiving the serial data. It offers short distance communication and it is reliable as well. This paper presents the application of UART module for creating Multiple Pulse Width Modulation (PWM) channels having different duty cycles using serial terminal on Field Programmable Gate Arrays (FPGA). The user can control the duty cycle of the PWM signals through serial terminal. UART module designed for this application features technique for baud rate detection. The design has been synthesized using Verilog Hardware Description Language (HDL) on Lattice Mach XO2 FPGA over a Tiny FPGA A2 module using Lattice Diamond Design software. A Printed Circuit Board (PCB) has been designed to observe the effects of PWM signals with different duty cycles over multiple Light Emitting Diodes (LEDs). The design is verified through simulations and logic analyzer tool. Effects of PWM signals is also observed through the intensity of Multiple LEDs. Maximum frequency that can be obtained on Lattice Mach XO2 FPGA is 133 MHz. The design uses 12.08 MHz frequency for the system clock.
机译:通用异步接收器发送器(UART)是用于发送和接收串行数据的通信协议。它提供短距离通信,也可靠。本文介绍了UART模块,用于使用现场可编程门阵列(FPGA)上的串行端子创建具有不同占空比的多脉冲宽度调制(PWM)通道的应用。用户可以通过串行终端控制PWM信号的占空比。 UART模块专为该应用程序具有波特率检测的功能技术。使用格子钻石设计软件,在晶格Mach XO2 FPGA上使用Verilog硬件描述语言(HDL)在晶格Mach XO2 FPGA上合成了设计。印刷电路板(PCB)旨在观察PWM信号在多个发光二极管(LED)上具有不同占空比的PWM信号的影响。通过仿真和逻辑分析工具验证设计。通过多个LED的强度观察PWM信号的效果。在晶格Mach XO2 FPGA上可以获得的最大频率为133 MHz。该设计为系统时钟使用12.08 MHz频率。

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