Design and simulation of asynchronous level crossing ADC using feedback DAC

摘要

Design and implementation of an asynchronous LC-ADC with feedback DAC in 180nm technology using cadence is presented in this paper. Operating at 110Hz using 0.8 V supply voltage, the ADC achieves 47dB SNDR for 684nW power consumption. This paper also presents a charge sharing 1 bit DAC with pseudo resistors and dummy devices suitable for an asynchronous level crossing ADC.