首页> 外文会议>Annual IEEE/ACM International Symposium on Microarchitecture >ASPEN: A Scalable In-SRAM Architecture for Pushdown Automata
【24h】

ASPEN: A Scalable In-SRAM Architecture for Pushdown Automata

机译:ASPEN:用于下推自动机的可扩展In-SRAM架构

获取原文

摘要

Many applications process some form of tree-structured or recursively-nested data, such as parsing XML or JSON web content as well as various data mining tasks. Typical CPU processing solutions are hindered by branch misprediction penalties while attempting to reconstruct nested structures and also by irregular memory access patterns. Recent work has demonstrated improved performance for many data processing applications through memory-centric automata processing engines. Unfortunately, these architectures do not support a computational model rich enough for tasks such as XML parsing. In this paper, we present ASPEN, a general-purpose, scalable, and reconfigurable memory-centric architecture for processing of tree-like data. We take inspiration from previous automata processing architectures, but support the richer deterministic pushdown automata computational model. We propose a custom datapath capable of performing the state matching, stack manipulation, and transition routing operations of pushdown automata, all efficiently stored and computed in memory arrays. Further, we present compilation algorithms for transforming large classes of existing grammars to pushdown automata executable on ASPEN, and demonstrate their effectiveness on four different languages: Cool (object oriented programming), DOT (graph visualization), JSON, and XML. Finally, we present an empirical evaluation of two application scenarios for ASPEN: XML parsing, and frequent subtree mining. The proposed architecture achieves an average 704.5 ns per KB parsing XML compared to 9983 ns per KB in a state-of-the-art XML parser across 23 benchmarks. We also demonstrate a 37.2x and 6x better end-to-end speedup over CPU and GPU implementations of subtree mining.
机译:许多应用程序处理某种形式的树状结构或递归嵌套的数据,例如解析XML或JSON Web内容以及各种数据挖掘任务。典型的CPU处理解决方案在尝试重建嵌套结构时会受到分支预测错误的惩罚,而且还会受到不规则的内存访问模式的阻碍。通过以内存为中心的自动机处理引擎,最近的工作证明了许多数据处理应用程序的性能得到了改善。不幸的是,这些体系结构不支持足够丰富的计算模型来执行诸如XML解析之类的任务。在本文中,我们介绍了ASPEN,这是一种用于处理树状数据的通用,可伸缩且可重新配置的以内存为中心的体系结构。我们从以前的自动机处理架构中汲取了灵感,但支持更丰富的确定性下推自动机计算模型。我们提出了一种自定义数据路径,该数据路径能够执行下推自动机的状态匹配,堆栈操作和过渡路由操作,所有这些操作均有效地存储和计算在内存阵列中。此外,我们提出了将大类现有语法转换为在ASPEN上可执行的下推自动机的编译算法,并展示了它们在四种不同语言上的有效性:酷(面向对象编程),DOT(图形可视化),JSON和XML。最后,我们对ASPEN的两个应用场景进行了实证评估:XML解析和频繁的子树挖掘。所提出的架构实现了平均每KB XML解析度为704.5 ns,而在23种基准测试中,最新的XML解析器解析度为每KB 9983 ns。与子树挖掘的CPU和GPU实施相比,我们还展示了37.2倍和6倍的端到端加速。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号