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ChipDE - A Development Environment for System Verilog-Based Digital IC Design

机译:ChipDE-基于系统Verilog的数字IC设计的开发环境

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A new software tool - ChipDE, which represents an efficient development environment for description of digital integrated circuits (IC) based on SystemVerilog language is presented. The proposed ChipDE tool provides various features, such as text editing, file/project browser, syntax-highlighting, code auto-completion, go to definition, block diagram drawing, generation of SystemVerilog code from block diagrams and generation of block diagrams from SystemVerilog code. The proposed ChipDE tool can significantly reduce the digital IC development time, enrich the documentation using the block diagrams and improve the overall readability and maintainability of designed digital integrated circuits and systems. Moreover, the proposed software solution can be used for didactic purposes, since the tool reduces the difficulty and time needed to learn SystemVerilog language, and helps to learn the basic design concepts and practical examples of digital IC designs.
机译:提出了一种新的软件工具-ChipDE,它表示一种有效的开发环境,用于基于SystemVerilog语言的数字集成电路(IC)描述。拟议的ChipDE工具提供各种功能,例如文本编辑,文件/项目浏览器,语法突出显示,代码自动完成,转到定义,框图,从框图生成SystemVerilog代码以及从SystemVerilog代码生成框图。 。拟议的ChipDE工具可以大大减少数字IC的开发时间,使用框图丰富文档,并提高设计的数字集成电路和系统的整体可读性和可维护性。此外,由于该工具减少了学习SystemVerilog语言所需的难度和时间,并有助于学习数字IC设计的基本设计概念和实际示例,因此该软件解决方案可以用于教学目的。

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