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Digital predistortion with low-precision ADCs

机译:低精度ADC的数字预失真

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Digital Predistortion (DPD) is a popular technique for linearizing a power amplifier (PA) to help reduce the spurious emissions and spectral regrowth. DPD requires the learning of the inverse PA nonlinearities by training on the output of the PA. In practical systems, the analog output of the PA will have to go through an analog-to-digital converter (ADC) so that training can be done on a digital processor. The quantization degrades signal quality and may limit the performance of a DPD learning algorithm. However, a lower resolution ADC may cost less and allow for less computational complexity in the digital processing. We study this trade-off to try to find how much precision is needed in DPD systems and discover that for a full-band DPD as few as 6 bits can reliably be used. For sub-band DPD, a single bit ADC can be used.
机译:数字预失真(DPD)是使功率放大器(PA)线性化以降低杂散发射和频谱再生的一种流行技术。 DPD需要通过对功率放大器的输出进行训练来学习功率放大器的逆非线性。在实际系统中,PA的模拟输出将必须经过模数转换器(ADC),以便可以在数字处理器上进行训练。量化会降低信号质量,并可能限制DPD学习算法的性能。但是,分辨率较低的ADC的成本可能更低,并且数字处理的计算复杂度也更低。我们研究了这种折衷方案,以试图找出DPD系统需要多少精度,并发现对于全频带DPD而言,至少可以可靠地使用6位。对于子带DPD,可以使用一位ADC。

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