A high-speed digital signal hierarchical parallel processing architecture based on CPU-GPU platform

摘要

Digital signal processing on the CPU-GPU platform has advantages of flexibility, scalability and easy maintenance. The powerful parallel processing capability of the CPU-GPU platform makes it inherently advantageous in high-speed signal processing. A hierarchical parallel processing architecture (HPPA) is proposed. This architecture uses a block processing technique different from stream processing used by field programmable gate array (FPGA). The main components are designed and the real-time performance of the architecture is analyzed. Conclusions can be used to determine the number of processing branches to ensure the real-time performance of the system.