Generic methodology to convert SPSRAM to PSEUDO SRAM with minimum design changes in SPSRAM architecture

摘要

Dual Port Static Random Access Memory (DPSRAM) with low speed can be implemented using Single port Static Random Access Memory (SPSRAM). In DPSRAM we have Eight Transistors (8T) Bit-cell and it has dedicated port for read and write operation. While In SPSRAM Bit-cell which consists of Six transistors (6T) bit-cell has single port for read and write operation. By making minimum design changes in SPSRAM architecture we can convert it into PSEUDO SRAM (PSRAM). The performance of PSRAM is limited because write and read operation is done in one cycle and clock cycle time must be long enough to accommodate one write and read operation. So it is difficult to tune the performance of PSRAM. In this proposed methodology we are using the wrapper circuit that is put around SPSRAM architecture to convert it into PSRAM whenever needed. DPSRAM bit-cell area is more because bit-cell is made of 8T hence challenging to make bigger size memory of DPSRAM. PSRAM bit-cell which is made of 6T can be used to make bigger size memory. Also for the same memory capacity PSRAM will have less leakage compared to DPSRAM. Design changes are done in a way allowing customer to use PSRAM as normal SPSRAM without compromising with performance.