Fast DC bus voltage control of single-phase PWM rectifiers using a ripple voltage estimator

摘要

The double line frequency ripple on the DC bus voltage of single-phase PWM rectifiers causes distortion in the line current and sluggish control dynamic. This paper presents an estimating scheme for the DC bus ripple voltage, which is used to cancel the ripple component in the measured bus voltage. This results in no oscillating component circulating in the bus voltage control loop. With this, the loop bandwidth can be increased to enhance the control dynamic. The proposed ripple voltage estimator uses the line current magnitude from the virtual synchronous reference frame current control loop, and the line voltage amplitude and frequency from the Park-based PLL as the input variables. Simulation and experiment of a 1-kW single PWM rectifier validate the proposed methodology. Experimental results show that under a load change of 960 W the proposed ripple cancellation scheme reduced the bus fluctuation by 50% of the conventional scheme and the settling time decreased from 3 line voltage cycles to one cycle with the line current THD of 2.5%.