首页> 外文会议>IEEE International Symposium on On-Line Testing and Robust System Design >SafeDE: a flexible Diversity Enforcement hardware module for light-lockstepping
【24h】

SafeDE: a flexible Diversity Enforcement hardware module for light-lockstepping

机译:SAFEDE:用于轻型锁定的灵活分集执行硬件模块

获取原文

摘要

Safety-related systems, such as those in automotive, avionics and space, impose the existence of appropriate safety measures to meet the safety requirements of the system. In the case of the highest integrity level functionalities (e.g. ASIL-D in automotive), diverse redundancy must be deployed to avoid unreasonable risk of a single fault leading the system to a failure (e.g. using lockstepped cores). However, existing lockstep solutions are either (1) highly intrusive and inflexible coupling two cores with hardware means, or (2) costly in terms of execution time and monitoring if a software monitor thread checks that cores running redundantly preserve sufficient staggering. This paper presents SafeDE, a Diversity Enforcement hardware module providing light-lockstep support by means of a non-intrusive and flexible hardware module that preserves staggering across cores running redundant threads, thus bringing time diversity. SafeDE reconciles the lightness and flexibility of software-only solutions, even allowing using the cores without any lockstepping, as well as the tighter staggering of hardware-only solutions that allow using staggering values of few cycles, instead of hundreds of microseconds, as for software-only solutions. Our integration of SafeDE in a RISC-V FPGA-based space multicore from Cobham Gaisler shows that staggering is effectively preserved, and SafeDE overheads are negligible in terms of area and performance due to staggering.
机译:安全相关系统,例如汽车,航空电子和空间中的系统,施加了适当的安全措施,以满足系统的安全要求。在完整性水平函数最高的情况下(例如ASIL-D在汽车中),必须部署不同的冗余,以避免将系统导致系统失败的单个故障的不合理风险(例如,使用LockStepped核心)。然而,现有的LockStep解决方案是(1)具有硬件装置的高度侵入性和不灵活的耦合两个核心,或者(2)在执行时间和监控方面的成本高昂,如果软件监视器线程检查核心冗余保留足够的惊人的核心。本文介绍了SafEDE,一种多样性强制硬件模块,提供了光锁停留支持,通过非侵入性和灵活的硬件模块,可在运行冗余线程的核心上保留交错,从而带来时间分集。 SAFEDE调和仅软件解决方案的亮度和灵活性,甚至允许使用核心没有任何锁定的核心,以及仅使用少数循环的惊人值的硬件解决方案的更紧密的交错,而不是用于软件的数百微秒-only解决方案。我们在COBHAM Gaisler的基于RISC-V基于FPGA的空间多核的Savede的集成表明,在面积和表现因惊人的情况下,安全架空的安全性占用了惊人。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号