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Realisation of a Differential Multiplier-Divider based on Current Feedback Amplifiers

机译:基于电流反馈放大器的差分乘法器分配器实现

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Architecture for differential analog multiplier-cum-divider circuits using current feedback amplifiers (CFAs) has been proposed in this paper. The proposed structure consists of five CFAs, six matched MOS transistors, all biased in the triode region, and four identical capacitors. The final expression for the output voltage of the derived circuit does not contain any constant multiplier term, thus making it independent of CMOS process technology used and of the common capacitor value chosen. Exploiting the advantages of CFAs and differential inputs, the circuit renders high transfer function accuracy, high noise immunity and wide bandwidth characteristics. The theoretical circuit analysis along with the experimental study validates the proposed circuit operation.
机译:本文提出了使用电流反馈放大器(CFAS)的差动模拟乘法器 - 分频器电路的架构。所提出的结构由五个CFA,六个匹配的MOS晶体管组成,均偏置在三极管区域和四个相同的电容器中。导出电路的输出电压的最终表达式不包含任何恒定的乘数项,从而使其独立于所选择的CMOS工艺技术和所选择的公共电容值。利用CFAS和差分输入的优点,电路呈现高转移功能精度,高抗噪性和宽带宽度特性。理论电路分析以及实验研究验证了所提出的电路操作。

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