A scalable and efficient hardware architecture for Montgomery modular division in dual field

摘要

As the most complicated and critical operation in finite field, a scalable and efficient implementation for modular division is very necessary and meaningful for elliptic curve cryptography. In this paper, an improved Montgomery modular division algorithm is presented depending on Kaliski's Montgomery inversion, which can reduce the execution cycles significantly compared with the traditional modular division. Then an excellent hardware architecture for Montgomery modular division is designed based on the improved Montgomery modular division algorithm. To optimize the execution time of this Montgomery modular division further, a fully pipelining strategy is adopted in our design. This design is scalable within 576-bit in dual field. Synthesized in 0.18µm CMOS technology, our design can perform the modular division algorithm occupied 43k gates in 17.5µs over GF(p576) and 12.6µs over GF(2576).