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Design and evaluation of approximate adders

机译:近似加入剂的设计与评估

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摘要

Approximate computing technique has become a new paradigm for circuit and system performance improvement. This paper proposes an approximate adder design method by re-encoding the adder outputs using genetic algorithm under the average error (AE) constraint and evaluating the area of the approximate adder with ABC tool. Based on this method, the 2-bit, 3-bit, and 4-bit approximate adders are carried out. Compared with the corresponding accurate adder, the area is reduced by 39.86%, 32.33% and 21.29% respectively.
机译:近似计算技术已成为电路和系统性能改进的新范式。本文通过在平均误差(AE)约束下使用遗传算法重新编码加法器输出来提出近似加法器设计方法,并使用ABC工具评估近似加法器的区域。基于此方法,执行2位,3位和4位近似加法器。与相应的准确加法器相比,该面积分别减少了39.86%,32.33%和21.29%。

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