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Interactive Model-Based Compilation Continued - Incremental Hardware Synthesis for SCCharts

机译:继续基于交互式模型的编译-SCCharts的增量硬件综合

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The Single-Pass Language-Driven Incremental Compilation (SLIC) strategy uses a series of model-to-model (M2M) transformations to compile a model or program to a specified target. Tool developer and modeler can inspect the result of each transformation step, using a familiar, graphical syntax of the successively transformed model, which is made possible by harnessing automatic layout. Previous work (presented at ISoLA'14) introduced the basics of the slic approach and illustrated it with a compiler that translated SCCharts, a synchronous, deterministic statechart language developed for safety-critical systems, to software. The compiler is implemented in the Kiel Integrated Environment for Layout Eclipse Rich Client (KIELER), an open-source development framework based on Eclipse. This paper proposes two extensions to SLIC. First, we extend the M2M transformation mechanism with a tracing capability that keeps track of model elements during transformations. Second, we make use of the tracing capability for an interactive simulation, where we not only observe a model's input /output behavior during execution, but can inspect the runtime behavior of each model component, at any transformation stage. We illustrate these concepts by new transformations in the KIELER SCCharts compiler, which allow to synthesize hardware circuits, and a simulator that executes an intermediate-level software model and visualizes the simulation at the high-level model as well as the low-level circuit.
机译:单通道语言驱动的增量编译(SLIC)策略使用一系列的模型到模型(M2M)转换,将模型或程序编译为指定的目标。工具开发人员和建模人员可以使用相继转换的模型的熟悉的图形语法来检查每个转换步骤的结果,这可以通过利用自动布局来实现。先前的工作(在ISoLA'14上提出)介绍了slic方法的基础,并用编译器将SCCharts(一种为安全关键系统开发的同步,确定性状态图语言)转换为软件的编译器进行了说明。该编译器在Kiel布局Eclipse富客户端集成环境(KIELER)中实现,KIELER是基于Eclipse的开源开发框架。本文提出了SLIC的两个扩展。首先,我们通过跟踪功能扩展了M2M转换机制,该功能可以跟踪转换过程中的模型元素。其次,我们利用跟踪功能进行交互式仿真,不仅可以在执行过程中观察模型的输入/输出行为,还可以在任何转换阶段检查每个模型组件的运行时行为。我们通过KIELER SCCharts编译器中的新转换来说明这些概念,该编译器允许合成硬件电路,以及一个模拟器,该模拟器执行中级软件模型并在高级模型和低级电路上可视化仿真。

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