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A Percolation Data Migration Schema in a hybrid Cache Hierarchy

机译:混合缓存层次结构中的渗透数据迁移模式

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To reduce data fetching latency in multi-core processor, a new on-chip cache model, Percolation Cache Hierarchy (PCH) that is a hybrid combination of convention on-chip caches, and a new data migration schema, called Percolation Data Migration Schema (PDMS), for moving data massively on PCH to enrich hit possibility and reduce data moving latency, are introduced in this paper. Basing on the percolation data migration schema, a new on-chip data environment, Just In-Time Data Environment (JITDE), can be setup on the PCH to exploit the properties of data locality to increase hit rate.
机译:为了减少多核处理器中的数据获取延迟,我们采用了新的片上缓存模型Percolation Cache Hierarchy(PCH),它将传统的片上缓存与新的数据迁移架构(称为Percolation Data Migration Schema(本文介绍了如何在PCH上大规模移动数据,以丰富命中可能性并减少数据移动延迟。基于渗滤数据迁移方案,可以在PCH上设置新的片上数据环境,即即时数据环境(JITDE),以利用数据局部性的特性来提高命中率。

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