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Pulse-position and pulse-amplitude modulation interface for serial data link applications

机译:串行数据链路应用的脉冲位置和脉冲幅度调制接口

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A serial communication link based on pulse-amplitude modulation combined with pulse-position modulation is presented in this paper. The timing problem that occurs when combining the pulse-position modulation and the pulse-amplitude modulation has been resolved using the proposed technique by applying the AM modulation to the data signal and the clock signal. Using the proposed architecture, the reception of the pulse-position modulated bits will not be affected by the combining of the amplitude modulation and the number of the amplitude levels can be increased as many as possible. The PPM technique and the AM technique are combined in so as to increase the total number of the transmitted bits without affecting the transmitted data signal bandwidth. A 5 bits 4 GB/s PAM-PPM link has been designed and simulated in 130 nm CMOS technology using 800 MHz input clock signal. The simulation results indicate that combining PAM technique with PPM technique increases the number of transmitted bits per clock cycle of the data signal without altering the bandwidth. The simulated power consumption of the designed transceiver is less than 90mW.
机译:提出了一种基于脉冲幅度调制与脉冲位置调制相结合的串行通信链路。通过将AM调制应用于数据信号和时钟信号,使用所提出的技术已经解决了当将脉冲位置调制和脉冲幅度调制组合在一起时出现的时序问题。使用所提出的架构,幅度调制的组合将不会影响脉冲位置调制位的接收,并且幅度级别的数量可以尽可能多地增加。结合PPM技术和AM技术以增加发送比特的总数而不影响发送数据信号带宽。已设计出5位4 GB / s PAM-PPM链路,并使用800 MHz输入时钟信号在130 nm CMOS技术中进行了仿真。仿真结果表明,将PAM技术与PPM技术相结合,可以在不改变带宽的情况下增加数据信号每个时钟周期的传输位数。设计的收发器的模拟功耗小于90mW。

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