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SPICE analysis of RL and RC snubber circuits for synchronous buck DC-DC converters

机译:同步降压DC-DC转换器的RL和RC缓冲电路的SPICE分析

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Operation of a 1.3-MHz, 12-to-1.2 V, 20-A synchronous buck converter is analyzed by SPICE simulations. Special attention is given to two resonances formed by the capacitance of FETs in the off-state and the total inductance of the input decoupling network. The resonances are the main source of the broadband electromagnetic (EM) interference. Two most common circuit level methods for reducing the EM interference, an RL snubber circuit and an RC snubber circuit, are analyzed and compared in terms of their impact on the radiation characteristics, efficiency and reliability of the analyzed synchronous buck converter.
机译:通过SPICE仿真分析了1.3MHz,12至1.2V,20A同步降压转换器的操作。要特别注意由处于关闭状态的FET电容和输入去耦网络的总电感形成的两个谐振。谐振是宽带电磁(EM)干扰的主要来源。分析和比较了两种最常见的用于降低EM干扰的电路级方法,即RL缓冲电路和RC缓冲电路,它们对分析的同步降压转换器的辐射特性,效率和可靠性有影响。

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