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A path-based equivalence checking method for Petri net based models of programs

机译:基于Petri网程序模型的基于路径的等价性检验方法

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Programs are often subjected to significant optimizing and parallelizing transformations. It is therefore important to model parallel behaviours and formally verify the equivalence of their functionalities. In this work, the untimed PRES+ model (Petri net based Representation of Embedded Systems) encompassing data processing is used to model parallel behaviours. Being value based with inherent scope of capturing parallelism, PRES+ models depict such data dependencies more directly; accordingly, they are likely to be more convenient as the intermediate representations (IRs) of both the source and the transformed codes for translation validation than strictly sequential variable-based IRs like Finite State Machines with Datapath (FSMDs) (which are essentially sequential control data-flow graphs (CDFGs)). In this work, a path based equivalence checking method for PRES+ models is presented.
机译:程序通常会经历重大的优化和并行化转换。因此,对并行行为进行建模并正式验证其功能的等效性非常重要。在这项工作中,包含数据处理的非定时PRES +模型(基于Petri网的嵌入式系统表示)用于建模并行行为。 PRES +模型是基于价值的,具有捕获并行性的固有范围,因此可以更直接地描述此类数据依赖性。因此,与严格顺序基于变量的IR(例如带有数据路径的有限状态机(FSMD))(实际上是顺序控制数据)相比,它们可能更方便地用作源和转换代码的中间表示(IR),以进行翻译验证。 -流程图(CDFG))。在这项工作中,提出了一种基于路径的PRES +模型等效性检查方法。

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