A 1-V 23-μW 88-dB DR Sigma-Delta ADC for high-accuracy and low-power applications

摘要

A 1-V 23-μW Sigma-Delta ADC for high-accuracy and low-power applications is presented in a standard 0.18-μm CMOS technology. To achieve high accuracy with low power consumption in low voltage environment, the proposed modulator is implemented with a 1-bit 3rd-order topology, in which the input-feedforward structure and switched-opamp technique are combined. Meanwhile, a pseudo RAM architecture is proposed for the decimation filter. The ADC achieves 88-dB DR over a 300-Hz bandwidth with an OSR of 128, while it consumes 23μW and occupies 0.69mm2.