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An EEG analog front-end design with wireless communication module for a portable EEG monitoring system

机译:具有用于便携式EEG监控系统的无线通信模块的EEG模拟前端设计

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In this paper, a wireless electroencephalography (EEG) acquisition analog front-end (AFE) circuit design is presented. The wireless EEG acquisition system includes an analog front-end readout chipset (AFERC) with extendable channel, a low-power MSP430 microcontroller from Texas Instruments and a commercial Bluetooth 2.0 module (BTM). The front-end readout chipset not only applies the ability of noise attenuation but also modulates the EEG signal into appropriate amplitude. It has individual 10-bit successive approximation register analog-to-digital converter (SAR-ADC) for each EEG channel, and it transmits the EEG signals which have been serially converted to digital format to MSP430. MSP430 is responsible for rearranging the converted digital bits and controlling the BTM with built-in Universal Asynchronous Receiver/Transmitter (UART) interface. The AFERC maximumly reaches to 64 channels, and single channel consumes 80.268 uW. Total power consumption of AFERC is 2.6 mW at with 32 channels, and its Common-Mode-Reject-Ratio (CMRR) is 75 dB.
机译:本文提出了一种无线脑电图(EEG)采集模拟前端(AFE)电路设计。无线EEG采集系统包括具有可扩展通道的模拟前端读出芯片组(AFERC),德州仪器(TI)的低功耗MSP430微控制器和商用蓝牙2.0模块(BTM)。前端读取芯片组不仅可以应用噪声衰减功能,还可以将EEG信号调制为适当的幅度。它为每个EEG通道具有单独的10位逐次逼近寄存器模数转换器(SAR-ADC),并将已被串行转换为数字格式的EEG信号发送到MSP430。 MSP430负责重新排列转换后的数字位,并通过内置的通用异步接收器/发送器(UART)接口控制BTM。 AFERC最大可达到64个通道,单通道消耗80.268 uW。在32个通道处,AFERC的总功耗为2.6 mW,其共模抑制比(CMRR)为75 dB。

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