A BLF Generation Scheme with Clock Variance-Tolerance for Baseband Processor of EPC Gen2 UHF RFID Tag

摘要

In this paper, a novel backscatter link frequency (BLF) generation scheme is presented. The accuracy of BLF required by EPC Class-1 Generation-2 (Gen2) is one of the critical issues in UHF RFID tag design. By analyzing the effects of division ratio and division error on the accuracy of BLF, a novel BLF generation scheme is proposed to reduce the BLF errors. Simulation results show that the BLF generated by the proposed scheme can satisfy the requirement of EPC Gen2 standard when the clock frequency is no less than 1.632 MHz, which significantly simplifies the design complexity of clock generator.