Comparative Performance Evaluation of Common Mode Voltage Reduction Three-Phase Inverter Topologies

摘要

Common-mode (CM) voltage related issues such as ground current and EMI are widely known in the three-phase PWM inverter based systems. With the adoption of better semiconductor switching devices, especially silicon carbide and gallium nitride devices, the increased dv/dt and switching frequency further aggravate the situation. As a result, a number of novel inverter topologies have recently been proposed by the researchers to achieve CM voltage reduction or cancellation. In this paper, three CM reduced topologies-floated, balanced, and four-leg inverter topologies have been studied with their performance compared. Based on the analytical, simulation, and experimental results, pros and cons of each topology are summarized and discussed.