Interleaved carrier-based modulations for reducing low-frequency neutral point voltage ripple in the three-phase neutral point clamped inverter

摘要

A number of modulation strategies have been proposed in literature in the particular case of three-phase three-level NPC topology, each one focusing on the optimization of specific aspects and performance of the converter, such as efficiency and neutral point (NP) balancing. It is well known that standard sinusoidal PWM produces low frequency oscillations of NP voltage, forcing the increase of the dc-link capacitance value to attenuate such oscillations. Recently proposed modulation techniques, such as double signal pulse width modulation (DSPWM), are able to eliminate low-frequency voltage oscillations of the neutral point, but increasing significantly switching losses and output harmonic distortion. In this paper, a novel modulation technique based on the combination of the standard SPWM and DSPWM is proposed, obtaining a mitigation of both losses and low frequency NP voltage ripple. Comparison with hybrid PWM approach will be reported, as far as losses and oscillation of NP voltage analysis. Simulation and experimental results based on a TMS320F28035 DSP controller and a NPC three level inverter are presented to confirm the effectiveness of the proposal.