Dedicated hardware architecture for object tracking preprocessing implemented in FPGA

摘要

New dedicated hardware architecture for object tracking preprocessing optimized and implemented in FPGA is proposed. It calculates the background image and dual form foreground image while reducing noise in the process. Used algorithms are optimized, the number of mathematical operations are reduced and multiplications are eliminated. 1280 × 1024 pixels optimized multiplier less hardware implementation is composed of 5 small dedicated architectures inter connected by multiplexers and internal registers. The proposed architecture is easily scalable. It is oriented for security tracking applications working in outdoor environment; however, it can be used in any image processing applications as a visual data preprocessing stage. It is resolution and frame rate independent and suitable for all high resolution and multiple camera systems. Optimization for FPGA makes it also suitable for reconfigurable computing and reconfigurable systems.