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A VCO-Based Continuous Time Delta-sigma ADC with An Alternative Feedforward Scheme VCO

机译:基于VCO的连续时间Δ-Sigma ADC,具有替代的馈送方案VCO

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A Voltage Controlled Oscillator (VCO) based continuous-time Delta-Sigma analog-to-digital converter (ADC) with an alternative new feedforward VCO scheme contributing to higher oscillation frequency within VCO-Based quantizer is explored in this paper. Fourth-Order noise shaping is achieved using three operational transconductance amplifiers (OTAs) and VCO acting as integrator and quantizer. Meanwhile, the excess loop delay (ELD) introduced by the finite gain-bandwidth product of OTAs is compensated by zero-order path in the loop filter to reduce the power consumption further. The simulation results indicate that this prototype achieves a SNDR of 72.17 dB over 10MHz bandwidth sampling at 400MHz while consumes 24mW for a 1.8V supply in 180nm CMOS technology.
机译:基于电压控制的振荡器(VCO)的连续时间Δ-Sigma模数转换器(ADC)在本文中探讨了在基于VCO的量化器内有助于更高振荡频率的替代新的前馈VCO方案。使用三个操作跨导放大器(OTA)和VCO作为积分器和量化器实现的四阶噪声整形。同时,由OTAS的有限增益带宽乘积引入的过量环路延迟(ELD)通过环路滤波器中的零级路径来补偿,以进一步降低功耗。仿真结果表明,该原型在400MHz的400MHz上采样超过10MHz的带宽采样,在180nm CMOS技术中消耗24mW的400MHz,达到72.17dB的SND。

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