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Synthilation: JIT-compilation of microinstruction sequences in AMIDAR processors

机译:合成:AMIDAR处理器中微指令序列的JIT编译

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The large expense of current chip fabrication can generally only be amortized for large manufacturing volumes. Thus, it is desirable to build adaptable chips that can be customized to the application needs after production. In this contribution we show that this adaptation is possible even without reconfigurable HW components. We propose synthilation, a new method for adapting the processor to the application requirements. It combines methods of hardware synthesis and software compilation to map high-level descriptions to hardware components of the processor. Our approach is applicable to varying degrees of reconfigurability, reaching from static microarchitectures just with writable control stores (variable microcode), to the exploitation of instruction level parallelism with multiple computational units. We consider both a practical real-world example as well as theoretical bounds on the speed-ups achievable by our method.
机译:通常只能为大批量生产分摊当前芯片制造的大笔费用。因此,期望构建可在生产后针对应用需求定制的适应性芯片。在本文中,我们证明了即使没有可重新配置的硬件组件,这种适应也是可能的。我们提出了合成,这是一种使处理器适应应用程序需求的新方法。它结合了硬件综合和软件编译的方法,以将高级描述映射到处理器的硬件组件。我们的方法适用于不同程度的可重新配置性,从仅具有可写控制存储的静态微体系结构(可变微代码)到具有多个计算单元的指令级并行性的利用。我们既考虑了实际的示例,也考虑了通过我们的方法可以实现的提速的理论界限。

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