Study of a cosmic ray impact on combinatorial logic circuits of an 8bit SAR ADC in 65nm CMOS technology

摘要

This paper presents a sensitivity study to ionizing particles, which are caused by cosmic rays, on a particular combinatorial function of an ST 65nm CMOS technology SAR ADC. A methodology for this study is exposed along with the simulation results. A geometrical visualization of the impacts shows the influence of the impact location effects on the function during operation. An ADC operating cycle analysis is made related to the impact effects showing combinatorial and memorization errors.