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Design and fabrication of ultra low-loss, high-performance 3D chip-chip air-clad interconnect pathway

机译:超低损耗,高性能3D芯片-芯片空气包覆互连路径的设计和制造

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In this study, we are pursuing an ultra low-loss interconnect pathway for 3D chip-chip connectivity, incorporating air-clad planar interconnects, air-clad TSVs, and gradual vertical-horizontal transitions. The motivation is to create an air-gap technology that offers the lowest possible effective k-value and near zero loss tangent minimizing the dielectric loss. The design and modeling of air-gap interconnection is presented. The fabrication challenges in air-clad interconnect lines are discussed. A monolithic inverted air-gap horizontal transmission line structure is proposed as a means for further decreasing the dielectric loss. Extension of air-clad TSV technology for optical transmission is briefly discussed.
机译:在这项研究中,我们正在寻求一种用于3D芯片-芯片连接的超低损耗互连路径,其中包括空气覆盖的平面互连,空气覆盖的TSV和逐渐的垂直-水平过渡。其动机是创建一种气隙技术,该技术提供尽可能低的有效k值和接近零的损耗角正切,以最大程度地降低介电损耗。介绍了气隙互连的设计和建模。讨论了气包互连线的制造挑战。提出了单片倒置气隙水平传输线结构作为进一步降低介电损耗的手段。简要讨论了气包TSV技术在光传输方面的扩展。

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