On the Efficient Evaluation of Self and Mutual Admittances of CPW-Fed Slot Elements in Linear Arrays on Electrically Thin Substrates

摘要

The evaluation of self and mutual admittances of CPW-fed slots on electrically thin dielectric substrates is addressed with reference to iterative array design procedures. A characterization of isolated slot self-properties indicated certain linear dependencies on slot dimensions, suggesting that less data may be required from computationally intensive a priori moment-method analyses of isolated slots. An approximate method for the fast, accurate calculation of mutual admittance between CPW-fed slots on electrically thin substrates is described. Its accuracy is shown to be comparable to moment-method-based calculations in IE3D. The method can be easily incorporated into iterative array design algorithms.