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Improving Stress Quality for SoC Using Faster-than-At-Speed Execution of Functional Programs

机译:使用更快的速度执行功能计划来提高SOC的压力质量

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At the end of the manufacturing cycle of digital circuits, a stress phase is mandatory in order to remove from the final device population the weak devices that may result in early life failures. Devices used in safety critical environments must undergo this phase that is usually accomplished by exploiting the Burn-In (BI) process. Unfortunately, BI has elevated costs for companies and current state of the art techniques are trying to reduce its cost. In recent days, Faster-than-at-Speed-Test (FAST) has become a useful technique to discover small delay defects. At the same time, overclocking methods to enhance system performances have been studied, which focus on temperature management to preserve system functionalities. In this contribution, a FAST technique is proposed with the aim of intentionally provoking a thermal overheating in the microprocessor by mean of the execution of FAST functional test programs; in other words, functional procedures are executed at higher than nominal frequencies. The goal is to introduce an internal stress stronger than current procedures used during BI in order to speed up early detection of latent faults. Being the functional stress procedures executed at faster than nominal speed, the original behaviour may not be preserved and therefore non-functional states may be reached. In this contribution, it is illustrated how to avoid blocking configurations due to timing constraints violation and how to obtain a significant increase of the switching activity by carefully increasing the clock frequency. Furthermore, a novel strategy is proposed to generate a suitable set of Faster-than-At-Speed stress programs capable to thoroughly stress processor cores. Experimental results carried out on a MlPS-like architecture show major achievements of the methodology: the processor may work at frequencies up to about 20 times higher than the nominal one without falling into an unpredictable state and the switching activity is increasing up to 300% per ns.
机译:在数字电路的制造周期结束时,强制阶段是强制性的,以便从最终设备群体中移除可能导致早期生命失败的弱设备。安全性关键环境中使用的设备必须经过此阶段,通常通过利用烧坏(BI)过程来实现。不幸的是,BI对公司的成本提高,现有技术的艺术技术正试图降低其成本。最近几天,速度超过速度 - 测试(快速)已成为发现小延迟缺陷的有用技术。同时,研究了提高系统性能的超频方法,专注于温度管理以保护系统功能。在这一贡献中,提出了一种快速技术,目的是通过执行快速功能测试程序的平均值故意激发微处理器中的热过热;换句话说,功能过程以高于标称频率执行。目标是引入比BI期间使用的当前程序更强大的内部压力,以加快潜伏断层的早期检测。作为更快地执行的功能压力过程比标称速度更快,可能无法保留原始行为,因此可以达到非功能状态。在这种贡献中,示出了如何避免由于定时约束违规而阻止配置,并且如何通过仔细增加时钟频率来获得切换活动的显着增加。此外,提出了一种新的策略来生成能够彻底应力处理器核的适当比速度应力节点的合适组。在MLPS的架构上进行的实验结果表明了方法的主要成就:处理器可以在频率下工作,该频率高于标称值的频率,而不会落入不可预测的状态,并且切换活动增加到每一个高达300% ns。

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