Modeling the Residual Common-Mode Voltage Generated by 3-Phase Inverters with Simultaneous-Switching PWM Strategies

摘要

In the simulation of power electronics systems, for reasons of computing time and convergence, it may be necessary to use ideal components which generate ideal voltage switchings (steep edges). However, in reality, these voltage variations are far from ideal and to reproduce a voltage closer to reality, it is necessary to model these variations. This is especially important for the study of residual voltage obtained by simultaneous switching, which are present in PWM strategies developped to reduce the impact of the common-mode voltage generated by 3-phase inverters. This paper is focused on the required model accuracy, in order to take into account these residues obtained by the synchronization of switching voltages.