High performance VLSI implementation of Context-based Adaptive Variable Length Coding (CAVLC) for H.264 encoder

摘要

The video coding standard H.264 uses Context-based Adaptive Variable Length Coding (CAVLC) as one of its entropy encoding techniques. This paper proposes VLSI architecture for CAVLC algorithm. The designed hardware meets the required speed of H.264 without compromising the hardware cost. The CAVLC encoder works at a maximum clock frequency of 126 MHz when implemented in Xilinx 10.1i, Virtex-5 technology. The speed is quite appreciable when compared to other existing works. The implemented architecture meets the required rate for processing of HD-1080 format video sequence.