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Power factor improvement of compact fluorescent lightings with valley-fill circuit

机译:具有山谷填充电路的紧凑型荧光的功率因数改进

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The objective of the work is to improve the power factor of the compact fluorescent lamps (CFLs) by reducing the Total Harmonic Distortion (THD). The power factor is improved by using modified electronic ballast with passive valley-fill power factor correction circuit. The proposed single-switch ballast circuit achieves zero current switching and also maximizes the efficiency of the circuit. The experiment is simulated and the results of electronic ballast with and without valley fill circuit are compared and analyzed with the hardware setup.
机译:该工作的目的是通过降低总谐波失真(THD)来改善紧凑型荧光灯(CFL)的功率因数。通过使用具有无源谷填充功率因数校正电路的改进的电子镇流器来改善功率因数。所提出的单开关镇流器电路达到零电流切换,并且还可以最大化电路的效率。模拟实验,并使用硬件设置进行比较和没有谷填充电路的电子镇流器的结果。

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