IEEE Std 1012 Current Revision Update - System, Software, and Hardware VV

摘要

Digital I&C systems offer higher reliability, better component/system performance and additional diagnostic capabilities. However, digital I&C systems require additional design and qualification approaches than are typically e mployed for analog control systems because digital I&C control systems are fundamentally different from analog I&C systems in that minor errors in design and implementation can cause them to exhibit unexpected behavior. The use of inspections, type testing, and acceptance testing of digital systems and components alone do not accomplish design qualification at a high enough confidence level. High confidence in the digital I&C system quality however, can be obtained by using a high quality engineering and development process that incorporates disciplined specification and implementation of design requirements. As part of the h igh quality engineering process, rigorous software life cycle verification and validation (V&V) methodologies are necessary. One approach to such V&V method is that described in IEEE Std 1012. The use of V&V methodologies described in IEEE 1012-1998 for digital software has been endorsed by Regulatory Guide 1.168-2004. An IEEE 1012 Working Group has submitted a proposed revision to the IEEE-1012 for approval. The new revision of this Standard provides guidance on system and hardware verification and validation in addition to the software V&V requirements of existing IEEE Std 1012-1998 and IEEE Std 1012-2004. T his paper provides an br ief description of the cha nges in the latest proposed revision. IEEE Std 1012-2012 is a process standard that defines the V&V processes in terms of specific activities and related tasks. The standard also defines the contents of the V&V plan (VVP), including example formats. Per this standard, verification and validation (V&V) is a t echnical discipline of systems engineering. The purpose of V&V is to help the development organization build quality into the system during the life cycle. V&V processes provide an objective assessment of products and processes throughout the development life cycle. This assessment demonstrates whether the requirements are c orrect, complete, accurate, c onsistent, and testa ble. The V&V processes determine whether the development products of a given activity conform to the requirements of that activity and whether the product satisfies its intended use and user needs. The determination includes assessment, analysis, evaluation, review, inspection, and testing of products and processes. V&V is performed in p arallel with all development life c ycle stages, not at their conclusion. V&V is an extension of program management and systems engineering that employs a rigorous methodology to identify objective data and conclusions to provide feedback about quality, performance, and sc hedule to the supplier. This feedback consists of anomaly resolutions, performance improvements, and quality improvements not only for expected operating conditions, but also across the full spectrum of the system and its interfaces. Early feedback results allow the development organization to modify the products in a timely fashion and thereby reduce overall project and schedule impacts. Without a proactive approach, anom alies and associated system changes are typically delayed to later in the program schedule, resulting in greater program costs and schedule delays. This standard is organized so that the V&V processes (system, software, or hardware) may be invoked separately or in any combination. The standard is a process standard that addresses all system and s oftware life cycle processes including the Agreem ent, Organizational Project-Enabling, Project, Technical, Software Implementation, Software Support, and Software Reuse process groups. This standard is compatible with all life cycle models (e.g., system, software and hardware). This standard defines the verification and validation processes that are applied to system, software, and hardware development throughout the life cycle including acquisition, supply, development, operations, maintenance, and retirement. This standard applies to system, software, and hardware being acquired, developed, maintained, or reused. The Verification Process and the Validation Process are interrelated and complementary processes that use each other's process results to establish better completion criteria and analysis, evaluation, review, inspection, assessment, and test V&V tasks for each life cycle activity.