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A High-Resolution Hybrid DPWM Circuit for Digitally Controlled Buck Converter in 0.13μm CMOS Process

机译:0.13μmCMOS工艺中用于数控降压转换器的高分辨率混合DPWM电路

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This paper describes a structure of high-resolution hybrid DPWM(Digital Pulses-width Modulator) for digitally controlled Buck converter. In this structure, delay line structure and DLL(Delay-locked Loop) are utilized to realize high resolution of DPWM circuit at high switching frequency(2MHz). The purposes of this circuit are fine time resolution and low power consumption. The proposed digital-analog mixed structure is designed for a Digitally Controlled Buck Converter in 0.13μm CMOS Process.
机译:本文介绍了一种用于数控降压转换器的高分辨率混合DPWM(数字脉冲宽度调制器)的结构。在此结构中,利用延迟线结构和DLL(延迟锁定环)在高开关频率(2MHz)下实现DPWM电路的高分辨率。该电路的目的是精细的时间分辨率和低功耗。拟议的数模混合结构是为采用0.13μmCMOS工艺的数控Buck转换器而设计的。

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