Screen printable etch paste was developed for low cost patterning of dielectric films. This technique offers a simple print and bake approach to pattern without the need for a rinse step. Residue analysis of the etched area showed no sign of any organic residue left behind by the etch process. High carrier lifetime indicates no significant contamination or silicon surface damage. The etched via diameter of 150 µm was demonstrated in thermal oxide while smaller via size of 100 µm was achieved in silicon nitride (SiNx) or a combination of silicon oxide and nitride. Contact resistance measurement through the etched vias using TLM method showed values less than 3mΩ.cm2. The etch paste and process technique can be easily used in PERC cell as well as advanced architecture Interdigitated Back Contact (IBC) cell for low cost patterning.
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机译：开发了可丝网印刷的蚀刻膏，用于对介电膜进行低成本构图。该技术提供了一种简单的图案印刷和烘烤方法，无需冲洗步骤。蚀刻区域的残留分析表明，蚀刻过程没有留下任何有机残留的迹象。较高的载流子寿命表明没有明显的污染或硅表面损坏。在热氧化物中证明了150 µm的蚀刻通孔直径，而在氮化硅（SiN x ）或氧化硅和氮化物的组合中实现了更小的100 µm的通孔尺寸。使用TLM方法通过蚀刻过孔测量的接触电阻显示值小于3mΩ.cm 2 。蚀刻膏和工艺技术可轻松用于PERC单元以及高级架构的交叉指背接触（IBC）单元，以进行低成本图案化。
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