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Ordering decoupled metadata accesses in multiprocessors

机译:在多处理器中排序解耦的元数据访问

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摘要

Hardware support for dynamic analysis can minimize the performance overhead of useful applications such as security checks, debugging, and profiling. To eliminate implementation complexity and improve flexibility, recent hardware proposals have decoupled the processing of the metadata needed for analysis from the application running on the main processor core. However, such decoupling can lead to inconsistencies between application data and analysis metadata in multiprocessor systems. If updates to data and metadata occur in different orders, the analysis can be rendered incorrect, leading to issues such as undetected security attacks or unnecessary program termination. This paper presents a practical hardware solution that ensures consistency between application data and analysis metadata in multiprocessor systems. We use hardware to track the order of data updates and enforce the same ordering on the analogous metadata operations. This solution works for both in-order and out-of-order processors and requires no changes to the cores, caches or coherence protocol. It is equally applicable to analysis architectures that use dedicated coprocessors or separate cores, is compatible with sequential and relaxed consistency models, and can accommodate metadata of different sizes. We show that, even with small tracking structures, our solution introduces a runtime overhead of less than 7% for PARSEC and SPLASH-2 benchmarks running on a 32-core system.
机译:对动态分析的硬件支持可以最大程度地减少有用应用程序的性能开销,例如安全检查,调试和性能分析。为了消除实现的复杂性并提高灵活性,最近的硬件提议已将分析所需的元数据的处理与主处理器内核上运行的应用程序分离开来。但是,这种去耦可能导致多处理器系统中应用程序数据和分析元数据之间的不一致。如果对数据和元数据的更新以不同顺序发生,则分析可能会变得不正确,从而导致诸如未检测到的安全攻击或不必要的程序终止之类的问题。本文提出了一种实用的硬件解决方案,可确保多处理器系统中应用程序数据和分析元数据之间的一致性。我们使用硬件来跟踪数据更新的顺序,并对类似的元数据操作执行相同的顺序。该解决方案适用于有序和无序处理器,不需要更改内核,缓存或一致性协议。它同样适用于使用专用协处理器或单独内核,与顺序和宽松一致性模型兼容并且可以容纳不同大小的元数据的分析体系结构。我们证明,即使使用小的跟踪结构,我们的解决方案也为在32核系统上运行的PARSEC和SPLASH-2基准引入了不到7%的运行时开销。

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