AN EFFICIENT 2-D DWT ARCHITECTURE WITH REDUCED MEMORY ACCESSES FOR LOW ENERGY CONSUMPTION

摘要

Discrete Wavelet Transform (DWT) has been widely used for multimedia processing such as signal analysis, signal compression, and numerical analysis, and there has been an increase of research into the hardware architecture of 2-D DWT for applications in intelligent environments such as mobile communications. However, because of its complex data flow and intensive arithmetic computation, designing an efficient 2-D DWT architecture with high throughput and small size internal memory for low energy consumption is a challenge. In this paper, we propose a new 2-D DWT architecture. To reduce energy consumption, we focus on the number of memory accesses which consume dominant part of total energy. The proposed method improves data flow of line-based architecture to reduce the number of internal memory accesses. In addition, we modify external memory allocation so that a port width of external memory is fully utilized. We also modify wavelet filter to align memory word segments with coefficients to be loaded. Evaluation results indicate that proposed architecture reduces both external and internal memory accesses resulting in low energy consumption.