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More Generalized Clock-Controlled Alternating Step Generator

机译:更通用的时钟控制交流步进发生器

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In this paper a new stream cipher generator, called More Generalized Clock-Controlled Alternating Step Generator is proposed for use in stream cipher applications. The design of the generator is simple, made up of three feedback shift registers which are connected such that one register (FSR A) controls the clocking of the other two registers (FSRs B and C). The generator generates a large family of output sequences using the same key (initial states and/or feedback functions). When the control register (PSR A) generates a de Bruijn sequence of period K = 2~κ and the other two registers (FSRs B and C) generate m-sequences of periods M = (2~m — 1) and N = (2~n — 1) respectively, then the output sequences have period P_z = 2~κ(2~m - l)(2~n - 1), linear complexity L bounded from below by (m + n)2~(κ-1) and from above by (m + n)2~κ. Furthermore, the distribution of short patterns in the output sequences occur equally likely and these sequences are secure against known correlation attacks.
机译:在本文中,提出了一种新的流密码生成器,称为“更通用的时钟控制交替步长生成器”,用于流密码应用。发生器的设计很简单,由三个反馈移位寄存器组成,它们相互连接,以便一个寄存器(FSR A)控制其他两个寄存器(FSR B和C)的时钟。生成器使用相同的键(初始状态和/或反馈功能)生成大量的输出序列。当控制寄存器(PSR A)生成周期为K = 2〜κ的de Bruijn序列,而其他两个寄存器(FSR B和C)生成周期为M =(2〜m_1)和N =( 2〜n_1),则输出序列的周期为P_z = 2〜κ(2〜m-l)(2〜n-1),线性复杂度L由下限为(m + n)2〜(κ -1)并从上方乘(m + n)2〜κ。此外,短模式在输出序列中的分布同样可能发生,并且这些序列对于已知的相关攻击是安全的。

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