We propose an efficient hardware architecture for the Blowfish algorithm. The speed is up to 4 bit/clock, which is 9 times faster than a Pentium. By applying operator-rescheduling method, the critical path delay is improved by 21.7%. We have successfully implemented it using Compass cell library targeted at a 0.6μm TSMC SPTM CMOS process. The die size is 5.7×6.1 mm{sup}2 and the maximum frequency is 50MHz.
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