Interface Design for the Mapping of Generalized Template Matching on Reconfigurable Systems

摘要

Algorithms considered as generalized template matching (GTM) operations can be accelerated by using reconfigurable systems with field programmable gate array (FPGA) hardware resources. This paper proposes a method of designing the interface among FPGA, host processor, and on-board memory for GTM operations. The goal is to support the automation of the interface design and to improve the portability of GTM design among different FPGA boards.