A Dynamic Data Prefetching Method of Improving the Momory Latency

摘要

In this paper, we propose a new design, called the adaptive data prefetcher, which is composed of two sectors: one is data pool (DP), and the other is instruction recognizer (IR). The adaptive data prefetcher may solve the data access latency. The instruction recognizer can decide where the needed data of the new instruction come from. We measure and evaluate our design using the SPEC CPU95. The results show that the enhanced processor architecture can be an attractive solution for the CPI improvement. Such a design provides improved bus traffic still room to the data prefetching buffer size to be used for data prefetching.